Knowledge is power in embedded designs

by donpedro

Knowledge is power, except, of course, for embedded designs, where knowledge of the peripherals and features of each microcontroller can mean significantly lower power consumption.

Brant Ivey, of Microchip Technology Inc., explains.

Taking the time to acquire a thorough knowledge of all of the peripherals, power management modes and features which are specific to each microcontroller (MCU) can dramatically reduce power consumption in embedded designs.

Run, idle & sleep
Most microcontrollers offer designers a range of familiar power-saving modes: Run, Idle and Sleep (see Figure 1). However, knowledge of the wide range of modes and features which are specific to each microcontroller is essential for a design to achieve the absolute minimum current consumption. One example of an architecture-specific mode, featured on some MCUs, is Deep Sleep. This removes power from the MCU core to minimise power consumption below the level of the normal power-down mode (see Figure 2).
Removing power from the core of the MCU, also removes power from the RAM, resulting in loss of information that would be retained in other low-power modes, such as Sleep. However, the benefit of Deep Sleep, becomes apparent with the very low leakage current that is caused by powering-down most of the device. This can result in substantially lower power-down currents, of less than 50 nA in some cases, as shown in Figure 1. Low leakage also makes Deep Sleep modes perform better in applications with high temperatures or voltages which would result in high Sleep-mode currents. The other major benefit of Deep Sleep mode is that it allows chip designs to move to smaller geometries with better performance, without sacrificing low power consumption. The best way to use such a mode is in applications with long power-down times, where the cost of re-initialising the application is far outweighed by the reduction in power-down current.
It is not only the low-power modes that can reduce power consumption and many features that improve performance also provide power benefits. For example, an MCU’s internal oscillator can be used whilst the main crystal is starting to run initialisation code. This reduces the total time that the device spends in Wake mode.

Block diagram showing Deep Sleep mode (PIC24F16KA)

Digital peripheral power consumption
Integrated peripherals can also help to significantly improve the performance of MCUs and allow the removal of external components, which both help to reduce power. However, if not used properly, the cost of running the peripheral can exceed the power savings.
Generally, the most power-hungry MCU peripherals are the serial communication buses. I2C™ and SPI communications both use multiple high-speed lines and the power cost of driving these lines is significant. SPI can consume many milliamps of current when run at high speeds, because it requires driving three high-speed I/Os which incur significant switching losses. While I2C is slower, it can be worse because it uses pull-up resistors, which can draw significant current when low-resistance pull-ups are used to achieve high speeds.
The easiest solution for reducing the power of these serial-communication peripherals is to reduce speed; however, that is not always an option. Since most of the cost of running serial communications comes from driving the bus, this is where the focus for reduction should be placed. For SPI it is important to have a clean board layout with short traces, to minimise impedance on the line. I2C requires the opposite: Higher-value pull-up resistors on the bus will reduce the current consumption and can be used, in some cases, without reducing the maximum speed. In both cases, power can be minimised by reducing the number of devices on the bus or by powering-off devices which are not in use, instead of using chip selects. In software, the power consumption of these peripherals can be reduced by making sure that the CPU is disabled if the application is waiting for serial data.
Additionally, grouping serial transmissions into clusters, rather than constantly transmitting, allows the application to spend more time powered down and less time waking up to send and receive data.

Analogue peripheral power consumption
The analogue peripherals on MCUs, such as BORs, comparators, and ADC, can have a large impact on current consumption but cannot always be as power-optimised as digital peripherals. It is important, therefore, to ensure that the application only enables analogue features when they are required. In many MCUs, for example, using the fastest clock and sample time, and disabling the ADC after sampling is complete, is preferable to lengthening the sample time or slowing down the ADC clock to get the required sample rate. Similarly, BOR features are more important when the device is running, to detect small voltage drops that can cause mis-execution, rather than when the device is powered down, where the BOR is only required to detect drops large enough to cause RAM corruption. Configuring the BOR to use a lower power state in Sleep mode than in Run mode can achieve a current draw as low as 50 nA or less when sleeping, whilst maintaining high performance when running.

All MCUs implement an array of features that can be used to improve the power consumption of a design. However, only a small portion of these apply to all devices. It is important to be familiar with all the peripherals and unique features which are specific to each microcontroller, in order to use that knowledge to a power-optimise a design.

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