By using a standard processor architecture to create a unified control environment, design engineers can improve system performance and reduce design cycle time.
By Ram Sathappan & Jean Anne Booth, Texas Instruments Incorporated (TI)
Modern factories and processing plants are technologically sophisticated operations. To control machinery and processes accurately, operations utilize the latest generations of sensors, actuators and servos. As an example of the technology added to derive benefit from the availability of precise control capabilities, layers of networking and automation have been added on the factory-floor level with control networks linked to IT networks that provide business information and strategies which in turn drive production decisions.
This centralized, networked vision of industrial control offers technicians and industrial engineers access to a wealth of data for observing, tweaking and optimizing operations. Plant managers and corporate executives can consult operations dashboards at a glance for a comprehensive view of the overall factory’s efficiency.
In the past, processes were manually controlled and each bay in the plant operated independently. Having access to real-time data summarizing the actual plant operation enables executives to be better informed of daily activity and to adjust business strategies based on real-time loading.
A gradual transition from isolated nodes to fully networked facilities has been in progress for some years.
Since this transition has been largely ad-hoc and unplanned, with each aspect of current industrial control design still focused fairly tightly on its own particular assortment of buses, networks, and controllers, it has given rise to the design of disconnected industrial control systems.
Although today there is a unified vision of networked industrial control from a top-down perspective, the view from the bottom up – looking from the central processing unit in each segment – is very fragmented. Until now, a single IC processor architecture that works effectively at all levels of a control infrastructure was simply not available.
Recent developments in processor technology give design engineers an opportunity to innovate within a unified industrial control paradigm. By carefully analyzing the performance, functionality, and communications requirements at each level of control, designers are able to utilize a unified, standard processor core architecture that not only provides optimal solutions at a competitive price, but also provides a reduction in software development cost and a significant reduction in design cycle time through software reuse.
Control levels
Typically industrial control is described as a hierarchy of four levels: (Figure 1)
• Sensors and actuators, which are used to monitor industrial processes to report status and sometimes initiate changes in state;
• Electric motors and other systems, such as induction heaters, to implement the changes in state of the processes or operations;
• Controls that analyze the information transmitted from sensor nodes and provide commands for the drive systems to effect desired changes, including programmable logic controller (PLCs) networks and programmable automation controller (PAC) networks that connect devices;
• Human machine interface (HMI) modules and displays that provide visual and algorithmically processed plant status to engineers and technicians.
Until today, no single software-compatible processor architecture could cost-effectively span all four levels of industrial control. By employing a common processor architecture, designers can reduce the number of software development tools that must be purchased, increase the amount of reusable code, and work exclusively in a familiar development environment.
The ARM® architecture is an open architecture, freely licensed and therefore not proprietary. The benefits of being an open architecture have made the ARM architecture a de facto standard has fostered the development of a robust, diverse, and global third-party software and hardware ecosystem.
As a leader in embedded processing, ARM Ltd. offers a range of processor cores capable of meeting industrial control’s performance requirements at every level. The evolutionary development of the cores has placed a premium on software compatibility and architectural continuity. There is complete software compatibility in upward migration from Cortex™-M3 cores to Cortex-A8 processors, making it easy to develop a control system with communications capabilities that are developed and tested just once but run across a spectrum of performance.
It should be noted that several ARM cores have integrated hardware support for industrial control functions, including deterministic behavior and multitasking.
While the cores provide an excellent starting point, microcontrollers (MCUs) and microprocessors (MPUs) incorporating ARM architecture cores must also provide the appropriate combination of integrated peripherals and memory options. Given the proliferation of applications within the category of industrial control, this requirement translates to a need for large product families encompassing a range of price, performance, and functionality solutions.
Finally, professional-grade software development tools that ease the development process and maximize code reuse are essential to helping design engineers realize a control system utilizing the unified architecture paradigm.
The best way to illustrate the flexibility and range of ARM’s cores — and determine the right mix of MCU and MPU peripherals for discrete control functions — is to analyze the requirements of each level of the control hierarchy from Figure 1.
Human-machine interface
From a processing perspective, the HMI interface at the top level of the control hierarchy is the most demanding. Basic user interfaces characterized by touch screen buttons, slide bars and basic 2D graphics can be handled by an MCU, such as one based on ARM’s Cortex-M3.
Beyond that, a high level operating system is required and the user interface solution shifts from an MCU to an MPU.
In automated facilities, operators working from remote control stations need to be able to monitor and observe as much of the factory floor as possible. To achieve full observation, a new level of graphics capability including 3D graphics and video is required. For example, one method of providing operator view of distributed industrial control systems is by having operators gain access to each segment by clicking on tabs on the screen for graphical displays of particular machinery or segment.
Advanced HMIs have the ability to display algorithmically-processed data, 2D and 3D graphics, and video transmitted from inspection cameras on the factory floor. Also available are the ability to display critical processes or production metrics in windows. Scaling, rendering and windowing are common capabilities for advanced HMIs. Touch screen, keypad and voice are optional input types, and all require an interface or peripheral support in the MPU.
A high level of interactivity with factory floor operations is essential, including switching views of inspection cameras, requesting reports on demand, and issuing commands to alter the process or assembly line. The control console can easily receive and process data from hundreds of devices in the underlying control network layers.
From a processor perspective, at the high end this level of interactivity requires a processor with built-in video graphics capability, rich I/O options and significant processing power. Also, the availability of the right peripherals and software libraries play a role in selecting the right processor.
Among the few processors with all aforementioned qualifications are those based on the ARM Cortex-A8. Specific peripherals, interfaces and performance parameters of the processors will be addressed later in this article.
Control level
The factory control level typically consists of a large number of PLCs operating at the control level. The PLCs collect sensor data and make decisions to change the state of the process and control relays and motors and the state of other mechanical equipment in the plant. They can monitor and manage a large network of IOs running into hundreds of nodes. PLCs typically require deterministic behavior – that is, each I/O behavior happens in exactly the same amount of time (or processor cycles), each time it occurs. Where the requirements for real-time deterministic behavior are slightly less strict, some PLCs utilize a real-time operating system (RTOS) to ease task-based programming while also ensuring that a system will react within a specific period of time.
One of the differentiating characteristics of ARM Cortex-M3 core is its hardware support for deterministic behavior. Instead of fetching data from caches, the Cortex-M3 fetches instructions and data directly from on-chip flash memory. It provides hardware capable of saving the CPU state during an exception. It always takes just 12 cycles after receiving an external interrupt for the processor to pass control to the interrupt handler and back-to-back interrupts (“tail-chained”) pass control to the interrupt handler in just six cycles.
From a design perspective, the Cortex-M3 core’s built-in determinism makes it possible to replace a two-chip solution for motor control with a single MCU. In the past, a digital signal processor (DSP) would be required to control the motor associated with the node. Meanwhile, the MCU would be handling connectivity with the rest of the system. Cortex-M3-based MCUs have the capability to maintain both. Hardware support of deterministic performance works best with a network protocol that has been designed to be deterministic. The IEEE 1588 Precision Time Protocol (PTP) with time precision offers this feature and possesses the capability of multicasting. From a automation design perspective, this means 10/100 Ethernet with hardware assist for IEEE1588 PTP is an important peripheral. In some instances of the higher end Programmable Automation Controllers (PAC), the need for Gigabit Ethernet is evident with increased amount of data transfer. Another popular method of communication in factory automation systems is the Controller Area Network (CAN) protocol allowing the design of distributed and redundant systems. Wireless networks are becoming popular for networking PLCs, sensors and other node-level devices. For communication between PLCs and PACs, WLAN (wireless Ethernet) is commonly used. The Sitara™ class of ARM microprocessors from TI have Ethernet MAC, CAN and SDIO for WLAN integrated on chip and possess the required performance to support the networking protocols. At the sensor level, the ZigBee protocol is gaining recognition. Based on the IEEE8 02.15.4 radio specification, ZigBee utilizes mesh networking technology to create robust, self-configuring networks, which is ideal for industrial applications.
Cortex M3-based MCUs have the performance necessary to execute the ZigBee protocol and all associated tasks excluding the radio. Additionally, a Cortex-M3 has the performance to handle 10/100 Base T Ethernet communications, full and half-duplex, with auto-MDIX support.
The Stellaris® family of ARM Cortex-M3-based MCUs from TI have the significant additional advantage of integrating both the Ethernet PHY and MAC on chip, which reduces costs compared to a two-chip solution and saves board space.
For designs that require greater than 10/100 Ethernet performance, designers should choose Cortex-A8-based MPUs, such as the Sitara family from TI.
The Cortex-M3 core is optimized for single-cycle access to on-chip Flash and SRAM, and delivers performance that designers would not have been able to reach in the MCU space previously. Because 50MHz Stellaris Cortex-M3 MCUs feature single-cycle Flash and single-cycle SRAM, designers have access to more raw performance with a Stellaris MCU running at 50MHz than with other MCUs running at 100MHz.
Design issues
A key decision point in the selection of a processor core is the availability of software that speeds time to market, including operating systems, libraries, and communications stacks.
The graphics requirements are often the driving factor that selects the operating system. Control applications that require 2D or 3D graphics, streaming video, and higher display resolutions generally also require a fully-featured RTOS, Embedded Linux or Windows™ Embedded CE operating systems, and will be at home on a processor based on the ARM9™ or Cortex™-A8 core like in the Sitara™ ARM MPUs that includes a full memory management unit (MMU).
An intelligent display module that can handle text, 2D graphics primitives, and QVGA JPEG images generally sets the upper bound for Cortex-M3-based MCUs. The Cortex-M3 core features a memory protection unit (MPU) that facilitates the efficient usage of small-footprint RTOSes and light-weight Linux kernels such as the Unisom kernel from RoweBots.
One of the advantages of the ARM architecture is that strong ecosystem mentioned earlier. This results in the availability of numerous third-party certified communications stacks, including the specialized industrial communications stacks required in the factory automation environment.
TI’s Stellaris MCUs build on this time-to-market advantage by providing Stellaris Ware® software that provides peripheral driver libraries, a graphics library, a USB library for USB Device, Host, and On-the-Go support, and boot loader support, along with an IEC 60730 self-test library that can be used in industrial applications for device diagnostics.
This time to market advantage extends to the Sitara™ MPUs with development hardware, drivers and board support packages for open source Linux, Windows Embedded CE6 as well as 3rd party support for RTOS like Neutrino, Integrity and VxWorks.
Power consumption
Power has become an important characteristic for all applications, including ones that draw power from the power mains. But whereas portable designs are largely concerned with the power consumption of the processor, industrial systems designers concentrate on electric bills and keeping utility costs as low as possible over time. Reduced power consumption also has positive environmental effects.
Electric motors are practically ubiquitous in factories and processing plants and generally consume large percentages of the plant’s power. Somewhat surprisingly, deterministic performance in the MCU core plays a significant role in power efficiency. When, as in the Cortex-M3, the efficiency of the MCUs interrupt service response increases by 60 percent, less system level power is consumed. A 60 percent faster interrupt service means the MCU can stop and start motors 60 percent faster — and this power saving adds up over the course of a year. In addition, the performance of the Cortex-M3 core can be used to implement intelligent digital commutation which can result in being able to chose a smaller motor for the application, allow the choice of a more efficient motor, or improve the performance of the motor (AC induction motor driven by space vector modulation rather than a simple sine algorithm, for example) – all of which decreases the required system power. Stellaris MCUs include specialized motor control PWMs with deadband timers and QEI for closed loop control to enable designers to increase efficiency and decrease power with the computational capabilities of the Cortex-M3 core.
Another power issue is the trend toward designing fully enclosed factory automation systems to guard against dust and other contaminants normally found in factory environments. If cooling the processor and associated electronics requires more than a heat sink, the designer is forced to consider vents and fans, which either defeats the original goal of an enclosed system or forces the installation of expensive cleaning systems for forced air.
The Sitara™ class of MPUs address the reduced power consumption requirements with adaptive software and hardware techniques that dynamically control voltage, frequency and power based on IC activity.
Peripherals and IOs
The value of processor cores based on a standard ARM architecture has numerous advantages. Since system-level designs are based on MPUs and MCUs, the functionality that IC manufacturers provide in the on-chip system around the core is equally important. Memory options are a key factor, and since on-chip peripherals provide the rest of the product differentiation, the types and numbers of peripherals and IO interfaces are key elements.
Two important communications blocks – the CAN controller and the Ethernet MAC and PHY with 1588 support – have already been discussed. Listed below are various IO options, many of which are in demand because they offer a wide range of data transfer applications:
• I2C: a multi-master serial computer bus used to attach low-speed peripherals;
• UART/USART: an advanced high-speed, general purpose communications peripheral;
• SPI: widely used synchronous serial data link that operates in full duplex mode;
• Inter Integrated Sound (I2S): drives a low distortion signal to an external IC for audio applications;
• External Peripheral Interface (EPI): a configurable memory interface with modes to support SDRAM, SRAM/Flash, legacy Host-Bus ×8 and ×16 peripherals, and a fast Machine-to-Machine (M2M) 150MB/sec parallel transfer interface;
• Universal Serial Bus (USB): USB interface for point to point or multipoint applications often including USB Host support for external storage of machine configuration or USB-on-the-Go.
In industrial applications, functionality such as very fast general purpose I/Os (GPIOs), pulse width modulation (PWM), quadrature encode inputs and analog-digital converter (ADC) channels are important for motor control and other machinery and process equipment.
A good idea of how many of these functions can be integrated on-chip is illustrated in Figure 3, a block diagram of a high-end MCU.
All of the on-chip functionality described above is widely available from most IC vendors. In some instances, product differentiation can be achieved through a more robust implementation. The integrated Ethernet MAC and PHY along with IEEE 1588 support on the Stellaris family devices is a good example of this product differentiation.
Another example is the Programmable Real-Time Unit (PRU) available on TI’s Sitara ARM9 MPUs. The PRU is a small processor with a limited instruction set that can be configured to provide specific resources for real-time functions that are not available on-chip.
In industrial control applications, the PRU is usually configured for IO. This may be a custom interface or an IO block that is not available in any MPU in the product line. Using the PRU can help save in system cost compared to adding an external chip to perform the same function. For instance, with the PRU industrial designers can implement additional standard interfaces such as an UART or industrial Fieldbus like Profibus. The full programmability of the PRU allows designers to even add their won customer proprietary interfaces.
Since the PRU is programmable, it can substitute for different types of IO in different execution scenarios to reduce power consumption and accelerate system performance.
For instance, the PRU can handle specialized custom data handling to offload the ARM9 processor by switching off the ARM clock.
Conclusion
As more semiconductor vendors jump on the bandwagon of utilizing the ARM architecture of MCUs and MPUs, designers of industrial control equipment will have a wider selection for their ICs. Product differentiation will be determined by the intelligent application of silicon (balanced memory systems, fast I/O and peripherals, and communications integration that speeds time to market), along with the availability of good software development tools, libraries and industrial stacks.
It will not be sufficient to simply have a superior inventory of MCUs or MPUs. It will be a higher priority to have an inventory of production ready tools and open source software, such as drivers or a graphics library of primitives and widgets, to offer designers a jump start on their design.
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