PLS’s Universal Debug Engine (UDE) 4.0.2: Optimized debugging solution for the new ARM® Cortex™-M0 core-based XMC1000 microcontroller family of Infineon

15 FEBRUARY 2013

PLS Programmierbare Logik & Systeme presents an optimized test and debugging solution, the Universal Debug Engine (UDE) version 4.0.2, for the new ARM® Cortex™-M0 core-based 32-bit microcontroller family XMC1000 of Infineon Technologies that delivers 32-bit performance at 8-bit prices.
Both the UDE 4.0.2 and PLS’s Universal Access Device family seamlessly support the internal debugging resources and peripheral units of the highly integrated XMC1000 components developed for use in intelligent sensor and actuator applications, LED controls, digital power conversion, and controllers for low-end electric motors, for example. The integrated FLASH/OTP programming functionality of the UDE guarantees maximum speeds in the whole Delete-Download-Programming-Verify cycle.
In order to be able to offer developers as many internal debugging options as possible despite the compact design – the new MCUs are accommodated in TSSOP packages with 16, 28 and 38 pins maximum – Infineon has implemented a series of different boot modes in the microcontrollers. These contain access via a serial bootstrap loader for simple FLASH programming, Serial Wire Debug (SWD) as the standard ARM® Cortex™ processor debugging interface and a single pin debug mode designed by Infineon to yield more I/O pins for the application. The various boot modes are configured automatically by using the UDE 4.0.2 and a universal access device. The devices supplied ex works in serial bootstrap loader mode are thus, for example, reconfigured to SWD mode transparently for the user when connected to the debugger.
The various possibilities for graphically displaying variables and their links to physical values within the Universal Debug Engine benefit above all from the real-time properties of the XMC1000 family. For example, it is possible for the debugger to read and write the entire main memory whilst a program is running without impairing real-time behavior. This permits the animation of variables, registers and memory content at runtime.
In addition, the periodic recording of the instruction counter permits a profiling function with portrayal of the percentage share of functions in the application’s runtime.

PLS PROGRAMIERBARE LOGIK & SYSTEME
www.pls-mc.com

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